Integrated circuits are put into protective packages to allow easy handling and assembly onto printed circuit boards and to protect the devices from damage. A very large number of package types exist. Some package types have standardized dimensions and tolerances, and are registered with trade industry associations such as JEDEC and Pro Electron. Other types are proprietary designations that may be made by only one or two manufacturers. Integrated circuit packaging is the last assembly process before testing and shipping devices to customers.
Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier. In flip chip systems the IC is connected by solder bumps to a substrate. In beam-lead technology, the metallized pads that would be used for wire bonding connections in a conventional chip are thickened and extended to allow external connections to the circuit. Assemblies using "bare" chips have additional packaging or filling with epoxy to protect the devices from moisture.
Through-hole packages
Through-hole technology uses holes drilled through the printed circuit board (PCB) for mounting the components. The component has leads that are soldered to pads on the PCB to electrically and mechanically connect them to the PCB.
A chip carrier is a rectangular package with contacts on all four edges. Leaded chip carriers have metal leads wrapped around the edge of the package, in the shape of a letter J. Leadless chip carriers have metal pads on the edges. Chip carrier packages may be made of ceramic or plastic and are usually secured to a printed circuit board by soldering, though sockets can be used for testing.
Pin grid arrays
Flat packages
Small outline packages
A small outline integrated circuit (SOIC) is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in-line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs.
Chip-scale packages
According to IPC's standard J-STD-012, Implementation of Flip Chip and Chip Scale Technology, in order to qualify as chip scale, the package must have an area no greater than 1.2 times that of the die and it must be a single-die, direct surface mountable package. Another criterion that is often applied to qualify these packages as CSPs is their ball pitch should be no more than 1 mm. Chip-scale package
Ball grid array
Ball grid array (BGA) uses the underside of the package to place pads with balls of solder in grid pattern as connections to PCB.[1][3]
Transistor, diode, small-pin-count IC packages
MELF: Metal electrode leadless face (usually for resistors and diodes)
Surface-mount components are usually smaller than their counterparts with leads, and are designed to be handled by machines rather than by humans. The electronics industry has standardized package shapes and sizes (the leading standardisation body is JEDEC).
The codes given in the chart below usually tell the length and width of the components in tenths of millimeters or hundredths of inches. For example, a metric 2520 component is 2.5 mm by 2.0 mm which corresponds roughly to 0.10 inches by 0.08 inches (hence, imperial size is 1008). Exceptions occur for imperial in the two smallest rectangular passive sizes. The metric codes still represent the dimensions in mm, even though the imperial size codes are no longer aligned. Problematically, some manufacturers are developing metric 0201 components with dimensions of 0.25 mm × 0.125 mm (0.0098 in × 0.0049 in),[31] but the imperial 01005 name is already being used for the 0.4 mm × 0.2 mm (0.0157 in × 0.0079 in) package. These increasingly small sizes, especially 0201 and 01005, can sometimes be a challenge from a manufacturability or reliability perspective.[32]
Mostly resistors and diodes; barrel shaped components, dimensions do not match those of rectangular references for identical codes.[50]
DO-214
Commonly used for rectifier, Schottky, and other diodes.
Three- and four-terminal packages
Small-outline transistor (SOT)
Other
DPAK (TO-252, SOT-428): Discrete Packaging. Developed by Motorola to house higher powered devices. Comes in three[63] or five-terminal[64] versions.
D2PAK (TO-263, SOT-404): Bigger than the DPAK; basically a surface mount equivalent of the TO220 through-hole package. Comes in 3, 5, 6, 7, 8 or 9-terminal versions.[65]
D3PAK (TO-268): Even larger than D2PAK.[66][67]
Five- and six-terminal packages
Small-outline transistor (SOT)
Packages with more than six terminals
Dual-in-line
Flatpack was one of the earliest surface-mounted packages.
Quad flat package (QFP): various sizes, with pins on all four sides
Low-profile quad flat-package (LQFP): 1.4 mm high, varying sized and pins on all four sides
Plastic quad flat-pack (PQFP), a square with pins on all four sides, 44 or more pins
Ceramic quad flat-pack (CQFP): similar to PQFP
Metric quad flat-pack (MQFP): a QFP package with metric pin distribution
Thin quad flat-pack (TQFP), a thinner version of LQFP
Quad flat no-lead (QFN): smaller footprint than leaded equivalent
Leadless chip carrier (LCC): contacts are recessed vertically to "wick-in" solder. Common in aviation electronics because of robustness to mechanical vibration.
Micro leadframe package (MLP, MLF): with a 0.5 mm contact pitch, no leads (same as QFN)
Power quad flat no-lead (PQFN): with exposed die-pads for heatsinking
Grid arrays
Ball grid array (BGA): A square or rectangular array of solder balls on one surface, ball spacing typically 1.27 mm (0.050 in)
Fine-pitch ball grid array (FBGA): A square or rectangular array of solder balls on one surface
Low-profile fine-pitch ball grid array (LFBGA): A square or rectangular array of solder balls on one surface, ball spacing typically 0.8 mm
Micro ball grid array (μBGA): Ball spacing less than 1 mm
Thin fine-pitch ball grid array (TFBGA): A square or rectangular array of solder balls on one surface, ball spacing typically 0.5 mm
Land grid array (LGA): An array of bare lands only. Similar to in appearance to QFN, but mating is by spring pins within a socket rather than solder.
Column grid array (CGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern.
Ceramic column grid array (CCGA): A circuit package in which the input and output points are high-temperature solder cylinders or columns arranged in a grid pattern. The body of the component is ceramic.
Lead-less package (LLP): A package with metric pin distribution (0.5 mm pitch).
Non-packaged devices
Although surface-mount, these devices require specific process for assembly.
Chip-on-board (COB), a bare silicon chip, that is usually an integrated circuit, is supplied without a package (which is usually a lead frame overmolded with epoxy) and is attached, often with epoxy, directly to a circuit board. The chip is then wire bonded and protected from mechanical damage and contamination by an epoxy "glob-top".
Chip-on-flex (COF), a variation of COB, where a chip is mounted directly to a flex circuit. Tape-automated bonding process is also a chip-on-flex process as well.
Chip-on-glass (COG), a variation of COB, where a chip, typically a liquid crystal display (LCD) controller, is mounted directly on glass.
Chip-on-wire (COW), a variation of COB, where a chip, typically a LED or RFID chip, is mounted directly on wire, thus making it a very thin and flexible wire. Such wire may then be covered with cotton, glass or other materials to make into smart textiles or electronic textiles.
There are often subtle variations in package details from manufacturer to manufacturer, and even though standard designations are used, designers need to confirm dimensions when laying out printed circuit boards.
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